1. Field of the Invention
The present invention relates to a functional material. The term “functional material” as used herein refers to a material which can serve a desired function based on its inherent properties such as electrical properties, dielectric properties, magnetic properties, optical properties, bonding properties or sealing properties. The functional material according to the present invention can be used as a wiring material, an electrode material, a filling material, a sealing material or a bonding material.
2. Description of the Related Art
As a means for realizing a three-dimensional circuit configuration in electronic devices such as various scales of integrated circuits, various types of semiconductor elements or chips thereof, there has been proposed a TSV (through-silicon-via) technology of providing a circuit substrate with a large number of through electrodes and stacking such circuit substrates. By applying the TSV technology to the three-dimensional circuit configuration, many functions can be packed into a small footprint. Moreover, important electrical pathways between elements can be dramatically shortened to increase processing speed. Japanese Patent No. 3869859 discloses a via hole structure essential for the TSV technology.
The via hole structure disclosed in Japanese Patent No. 3869859 must contain a binder and/or a reactive monomer or polymer in addition to a high melting point metal, a low melting point metal or metal alloy and a crosslinking agent. In a cured state within a via hole, a polymeric network generated by crosslinking of organic constituents of a conductive adhesive coexists with an alloyed metal network.
After the via hole structure disclosed in Japanese Patent No. 3869859 is cured within the via hole, the polymeric network coexists with the alloyed metal network, as described in its specification. This degrades electrical conductivity accordingly.
Also, there is a problem inherent in diffusion bonding of metal, i.e., the formation of voids, cracks or the like due to Kirkendall voids. Kirkendall voids arise as atomic vacancies (lattice), which arise from the asymmetry of interdiffusion, accumulate without disappearing. In the case of a Sn/Cu interface, for example, since Sn diffuses less than Cu, the vacancies accumulate at the interface between the intermetallic compound and Cu, thereby forming Kirkendall voids. Such Kirkendall voids may grow into a larger void or crack, deteriorating the reliability or quality of electrodes and therefore causing disconnection. Japanese Patent No. 3869859 does not disclose any countermeasure against this problem.
A similar problem arises when a wiring planar conductive pattern is formed on a surface of a wafer along with or independently of through electrodes, when semiconductor chips are connected to each other in an electronic device, e.g., in the form of three-dimensional system-in-package (3D-SiP), or when sealing is performed in a liquid crystal device or the like.